Noise figure reduction of a GaAs-based pHEMT transistor by optimizationof the gate barrier layer thickness using numerical simulation
DOI:
https://doi.org/10.17308/kcmf.2026.28/13967Keywords:
GaAs-pHEMT,, Numerical Simulation, Noise figure, TransconductanceAbstract
Objectives: The objective of the present work is to reduce the noise figure of a GaAs-based pHEMT transistor by optimizing the thickness of the gate barrier layer of the transistor heterostructure, and to investigate the applicability of numerical simulation methods for this purpose.
Experimental: Numerical simulation of the transconductance and drain current of a low-noise pHEMT transistor was carried out using the drift-diffusion and hydrodynamic models of charge carrier transport in the channel.
Conclusions: It is shown that the hydrodynamic model describes the experimental results for a pHEMT transistor with a sub-micron gate length more accurately than the drift-diffusion model. The optimal heterostructure design of a low-noise pHEMT transistor was determined by means of the hydrodynamic numerical model, which resulted in a reduction of the minimum noise figure of the pHEMT transistor by 0.1 dB to a level of 0.7 dB
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